The 4416 is a high-speed, 65,536-bit, dynamic, random-access memory, organized as 16,384 words of 4 bits each. It employs state-of-the-art SMOS (scaled MOS) N-channel double-level polysilicone gate technology for very high performance combined with low cost and improved reliability.
The 4416 features RAS¬ access times to 120ns maximum. Power dissipation is 200 mW typical operating, 17.5 mW typical standby.
New SMOS technology permits operation from a single +5V supply, reducing system power supply and decoupling requirements, and easing board layout. Idd peaks have been reduced to 60 mA typical and a -1V input voltage undershoot can be tolerated, minimizing system noise considerations. Input clamp diodes are used to ease system design.
Refresh period is extended to 4 milliseconds, and during this period each of the 256 rows must be strobed with RAS¬ in order to retain data. CAS¬ can remain high during the refresh sequence to conserve power.
All inputs and outputs, including clocks, are compatible with Series 54/74 TTL. All address lines are data-in are latched on chip to simplify system design. Data-out is unlatched to allow greater system flexibility.
