The AT24C04 is a serial 4K EEPROM fabricated for high reliability, high performance CMOS technology. It’s 4K of memory is organized as 512 x 8 bits. The memory is configured as 32 pages with each page containing 16 bytes. This device offers significant advantages in low power applications. The AT24C04 uses the I²C addressing protocol and 2-wire serial interface which includes a bidirectional serial data bus synchronized by a clock. It offers a flexible byte write and a faster 16-byte page write. The AT24C04 is assembled in either a 8-pin PDIP or 8-pin SOIC package. Pin #1 is not connected (NC). Pin #2 is the A1 device address input for the AT24C04. Pin #3 is the A2 device address input for the AT24C04, such that a total of four AT24C04 devices can be connected on a single bus. Pin #4 is the ground (Vss). Pin #5 is the serial data (SDA) pin used for bidirectional transfer of data. Pin #6 is the serial clock (SCL) input pin. Pin #7 is the write protect (WP) pin used to protect hardware data. Pin #8 is the power supply (Vcc) pin.
All data is serially transmitted in bytes (8 bits) on the SDA bus. To access the AT24C04 (slave) for a read or write operation, the controller (master) issues a start condition by pulling SDA from high to low while SCL is high. The master then issues the device address byte which consists of 1010 (A2) (A1) (B8) (R/W).The most significant bits (1010) are a device type code signifying an EEPROM device. A1 and A2 are the device address select bits which has to match the A1 and A2 pin inputs on the AT24C04 device. The B[8] bit is the most significant bit of the memory address. The read/write bit determines whether to do a read or write operation. After each byte is transmitted, the receiver has to provide an acknowledge by pulling the SDA bus low on the ninth clock cycle. The acknowledge is a handshake signal to the transmitter indicating a successful data transmission.
