The 4164 is a high speed Dynamic Random Access Memory (DRAM)in a 16−Lead DIP type package organized as 65,536 words of one bit each. Refresh period is extended to 4 milliseconds, and during this period each of the 256 rows must be strobed with RAS in order to retain data. CAS can remain high during the refresh sequence to conserve power. All inputs and outputs, including clocks, are compatible with Series 74TTL. All address lines and data−in are latched on chip to simplify system design. Data−out is unlatched to allow greater system flexibility. Pin1 has no internal connections to allow compatibility with other 64K RAMs using this pin for an additional function.
